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SC1405D
POWER MANAGEMENT
Typical Characteristics
Performance diagrams, Application Evaluation Board.
PIN Descriptions
PIN Descriptions
Timing diagram:
Ch1: CO input
Ch2: TG drive
Ch3: BG non-overlap drive
Ch4: phase node
Iout = 20A (10A/phase)
Refer to Eval. Schematic
(fig.3)
Timing diagram:
Rise/Fall times
Ch1: TG drive
Ch2: BG drive
Cursor: Tpdh TG
Iout = 20A (10A/phase)
Refer to Eval. Schematic
(fig.3)
V IN = 12V, V OUT = 1.6V. Top FET = IR7811 FDB7030(BL) Qgd = 23nc
? 2005 Semtech Corp.
10
www.semtech.com
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